Searched refs:X86_CR0_NW (Results 1 – 16 of 16) sorted by relevance
55 orl $(X86_CR0_NW | X86_CR0_CD | X86_CR0_PE), %eax187 andl $(~(X86_CR0_CD | X86_CR0_NW)), %eax
34 orl $(X86_CR0_NW | X86_CR0_CD), %eax
39 orl $(X86_CR0_NW | X86_CR0_CD), %eax
103 andl $(~(X86_CR0_CD | X86_CR0_NW)), %eax162 andl $(~(X86_CR0_CD | X86_CR0_NW)), %eax
37 #define X86_CR0_NW 0x20000000 /* Not Write-through */ macro
391 cr0 &= ~(X86_CR0_NW | X86_CR0_CD); in x86_enable_caches()402 cr0 |= X86_CR0_NW | X86_CR0_CD; in x86_disable_caches()
121 TEST_INVALID_CR_BIT(vcpu, cr0, sregs, X86_CR0_NW); in main()
68 #define X86_CR0_NW _BITUL(X86_CR0_NW_BIT) macro
12 #define X86_CR0_PDPTR_BITS (X86_CR0_CD | X86_CR0_NW | X86_CR0_PG)
920 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) in kvm_is_valid_cr0()12145 new_cr0 |= (old_cr0 & (X86_CR0_NW | X86_CR0_CD)); in kvm_vcpu_reset()12147 new_cr0 |= X86_CR0_NW | X86_CR0_CD; in kvm_vcpu_reset()
141 write_cr0(read_cr0() | X86_CR0_NW); in set_cx86_memwb()
288 if (CC((save->cr0 & X86_CR0_CD) == 0 && (save->cr0 & X86_CR0_NW)) || in __nested_vmcb_check_save()1719 if (((cr0 & X86_CR0_CD) == 0) && (cr0 & X86_CR0_NW)) in svm_set_nested_state()
1911 hcr0 &= ~(X86_CR0_CD | X86_CR0_NW); in svm_set_cr0()
1233 #define X86_CR0_NW (1UL<<29) /* Not Write-through */ macro
120 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
145 #define KVM_VM_CR0_ALWAYS_OFF (X86_CR0_NW | X86_CR0_CD)