Searched refs:X86_BUG_EIBRS_PBRSB (Results 1 – 4 of 4) sorted by relevance
485 #define X86_BUG_EIBRS_PBRSB X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */ macro
511 #define X86_BUG_EIBRS_PBRSB X86_BUG(28) /* EIBRS is vulnerable to Post Barrier RSB Predictions */ macro
1606 if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) { in spectre_v2_determine_rsb_fill_type_at_vmexit()2824 if (boot_cpu_has_bug(X86_BUG_EIBRS_PBRSB)) { in pbrsb_eibrs_state()
1395 setup_force_cpu_bug(X86_BUG_EIBRS_PBRSB); in cpu_set_bug_bits()