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Searched refs:W_MISC1 (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/char/
H A Descc.c132 #define W_MISC1 10 macro
304 s->wregs[W_MISC1] &= MISC1_ENC_MASK; in escc_soft_reset_chn()
335 s->wregs[W_MISC1] = 0; in escc_hard_reset_chn()
587 case W_MISC1 ... W_CLOCK: in escc_mem_write()