Searched refs:WM97XX_ADCSEL_MASK (Results 1 – 5 of 5) sorted by relevance
225 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, (adcsel & WM97XX_ADCSEL_MASK) in wm9705_poll_sample()252 if ((*sample ^ adcsel) & WM97XX_ADCSEL_MASK) { in wm9705_poll_sample()254 adcsel & WM97XX_ADCSEL_MASK, in wm9705_poll_sample()255 *sample & WM97XX_ADCSEL_MASK); in wm9705_poll_sample()307 dig1 &= ~(WM97XX_CM_RATE_MASK | WM97XX_ADCSEL_MASK | in wm9705_acc_enable()
265 wm97xx_reg_write(wm, AC97_WM97XX_DIGITISER1, (adcsel & WM97XX_ADCSEL_MASK) in wm9712_poll_sample()292 if ((*sample ^ adcsel) & WM97XX_ADCSEL_MASK) { in wm9712_poll_sample()294 adcsel & WM97XX_ADCSEL_MASK, in wm9712_poll_sample()295 *sample & WM97XX_ADCSEL_MASK); in wm9712_poll_sample()428 dig1 &= ~(WM97XX_CM_RATE_MASK | WM97XX_ADCSEL_MASK | in wm9712_acc_enable()
150 if ((x & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_X || in wm97xx_acc_pen_down()151 (y & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_Y || in wm97xx_acc_pen_down()152 (p & WM97XX_ADCSEL_MASK) != WM97XX_ADCSEL_PRES) in wm97xx_acc_pen_down()
272 dig1 |= 1 << ((adcsel & WM97XX_ADCSEL_MASK) >> 12); in wm9713_poll_sample()302 if ((*sample ^ adcsel) & WM97XX_ADCSEL_MASK) { in wm9713_poll_sample()304 adcsel & WM97XX_ADCSEL_MASK, in wm9713_poll_sample()305 *sample & WM97XX_ADCSEL_MASK); in wm9713_poll_sample()
46 #define WM97XX_ADCSEL_MASK 0x7000 /* ADC selection mask */ macro