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Searched refs:WM8850_PLL_DIV (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/clk/
H A Dclk-vt8500.c342 #define WM8850_PLL_DIV(x) ((((x >> 8) & 1) + 1) * (1 << (x & 3))) macro
658 pll_freq /= WM8850_PLL_DIV(pll_val); in vtwm_pll_recalc_rate()