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Searched refs:WL_HI_FREQ_STATE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_write_leveling.c124 WL_HI_FREQ_STATE - 1; in ddr3_write_leveling_hw()
415 if (sum < (WL_HI_FREQ_STATE * (dram_info->num_of_total_pups))) { in ddr3_wl_supplement()
560 WL_HI_FREQ_STATE - 1; in ddr3_write_leveling_hw_reg_dimm()
H A Dddr3_hw_training.h169 #define WL_HI_FREQ_STATE 1 macro