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Searched refs:WDTIM_MCTRL_M_RES1 (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-lpc32xx/
H A Dwdt.h32 #define WDTIM_MCTRL_M_RES1 (1 << 3) macro
/openbmc/u-boot/arch/arm/cpu/arm926ejs/lpc32xx/
H A Dcpu.c37 writel(WDTIM_MCTRL_M_RES1, &wdt->mctrl); in reset_cpu()