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Searched refs:VxxV (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dext.idef661 VxxV.v[0].h[i] += fGETBYTE(0,VuuV.v[1].h[i]);
704 VxxV.v[0].w[i]+= fGETHALF(0,VuuV.v[1].w[i]);
708 VxxV.v[1].w[i]+= fGETHALF(1,VuuV.v[1].w[i]))
949 fHIDE(int64_t ) mask = (((fSE32_64(VxxV.v[0].w[i])) << 32) | fZE32_64(VxxV.v[0].w[i]));
954 VxxV.v[0].w[i] = (result & 0xffffffff))
1441 VxxV.v[1].w[i] = prod >> 16;
1442 fSETHALF(0, VxxV.v[0].w[i], VxxV.v[0].w[i] >> 16);
1566 VxxV.v[0].w[i] = fCAST8s(VxxV.v[0].w[i]) + fMPY16SS(fGETHALF(0, VuV.w[i]), fGETHALF(0, RtV));
1567 VxxV.v[1].w[i] = fCAST8s(VxxV.v[1].w[i]) + fMPY16SS(fGETHALF(1, VuV.w[i]), fGETHALF(1, RtV)))
1572 …VxxV.v[0].w[i] = fVSATW(fCAST8s(VxxV.v[0].w[i]) + fMPY16SS(fGETHALF(0, VuV.w[i]), fGETHALF(0, RtV…
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/openbmc/qemu/target/hexagon/
H A Dcpu.h106 MMVectorPair VxxV QEMU_ALIGNED(16);
/openbmc/qemu/target/hexagon/mmvec/
H A Dmacros.h37 #define VxxV (*(MMVectorPair *)(VxxV_void)) macro