Searched refs:VPU_37XX_HOST_SS_ICB_STATUS_1 (Results 1 – 2 of 2) sorted by relevance
150 #define VPU_37XX_HOST_SS_ICB_STATUS_1 0x00010214u macro
50 #define ICB_1_IRQ_MASK ((REG_FLD(VPU_37XX_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_2_INT)) | \51 (REG_FLD(VPU_37XX_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_3_INT)) | \52 (REG_FLD(VPU_37XX_HOST_SS_ICB_STATUS_1, CPU_INT_REDIRECT_4_INT)))