Searched refs:VPU_37XX_HOST_SS_ICB_ENABLE_0 (Results 1 – 2 of 2) sorted by relevance
157 #define VPU_37XX_HOST_SS_ICB_ENABLE_0 0x00010240u macro
877 REGV_WR64(VPU_37XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK); in ivpu_hw_37xx_irq_enable()886 REGV_WR64(VPU_37XX_HOST_SS_ICB_ENABLE_0, 0x0ull); in ivpu_hw_37xx_irq_disable()