Searched refs:VPU_37XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0 (Results 1 – 2 of 2) sorted by relevance
467 u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0); in ivpu_boot_pwr_island_trickle_drive()470 val = REG_SET_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0, MSS_CPU, val); in ivpu_boot_pwr_island_trickle_drive()472 val = REG_CLR_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0, MSS_CPU, val); in ivpu_boot_pwr_island_trickle_drive()474 REGV_WR32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0, val); in ivpu_boot_pwr_island_trickle_drive()
173 #define VPU_37XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0 0x00030028u macro