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Searched refs:VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_3_sh_mask.h17738 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h29008 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h36440 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h41023 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h39172 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h42080 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h33600 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_1_4_sh_mask.h37636 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h38393 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro
H A Ddcn_3_2_0_sh_mask.h36437 #define VPG0_VPG_ISRC1_2_DATA__VPG_ISRC_DATA_BYTE1__SHIFT … macro