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Searched refs:VMSTATE_UINTTL_ARRAY (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/target/alpha/
H A Dmachine.c28 VMSTATE_UINTTL_ARRAY(ir, CPUAlphaState, 31),
29 VMSTATE_UINTTL_ARRAY(fir, CPUAlphaState, 31),
63 VMSTATE_UINTTL_ARRAY(shadow, CPUAlphaState, 8),
64 VMSTATE_UINTTL_ARRAY(scratch, CPUAlphaState, 24),
/openbmc/qemu/target/mips/sysemu/
H A Dmachine.c83 VMSTATE_UINTTL_ARRAY(gpr, TCState, 32),
88 VMSTATE_UINTTL_ARRAY(HI, TCState, MIPS_DSP_ACC),
89 VMSTATE_UINTTL_ARRAY(LO, TCState, MIPS_DSP_ACC),
90 VMSTATE_UINTTL_ARRAY(ACX, TCState, MIPS_DSP_ACC),
101 VMSTATE_UINTTL_ARRAY(mxu_gpr, TCState, NUMBER_OF_MXU_REGISTERS - 1),
309 VMSTATE_UINTTL_ARRAY(env.CP0_WatchLo, MIPSCPU, 8),
323 VMSTATE_UINTTL_ARRAY(env.CP0_KScratch, MIPSCPU, MIPS_KSCRATCH_NUM),
/openbmc/qemu/target/riscv/
H A Dmachine.c192 VMSTATE_UINTTL_ARRAY(env.gprh, RISCVCPU, 32),
256 VMSTATE_UINTTL_ARRAY(env.tdata1, RISCVCPU, RV_MAX_TRIGGERS),
257 VMSTATE_UINTTL_ARRAY(env.tdata2, RISCVCPU, RV_MAX_TRIGGERS),
258 VMSTATE_UINTTL_ARRAY(env.tdata3, RISCVCPU, RV_MAX_TRIGGERS),
359 VMSTATE_UINTTL_ARRAY(env.gpr, RISCVCPU, 32),
404 VMSTATE_UINTTL_ARRAY(env.mhpmevent_val, RISCVCPU, RV_MAX_MHPMEVENTS),
405 VMSTATE_UINTTL_ARRAY(env.mhpmeventh_val, RISCVCPU, RV_MAX_MHPMEVENTS),
/openbmc/qemu/target/ppc/
H A Dmachine.c449 VMSTATE_UINTTL_ARRAY(env.tm_gpr, PowerPCCPU, 32),
483 VMSTATE_UINTTL_ARRAY(env.sr, PowerPCCPU, 32),
595 VMSTATE_UINTTL_ARRAY(env.tgpr, PowerPCCPU, 4),
744 VMSTATE_UINTTL_ARRAY(env.gpr, PowerPCCPU, 32),
746 VMSTATE_UINTTL_ARRAY(env.gprh, PowerPCCPU, 32),
752 VMSTATE_UINTTL_ARRAY(env.spr, PowerPCCPU, 1024),
/openbmc/qemu/include/migration/
H A Dcpu.h58 #define VMSTATE_UINTTL_ARRAY(_f, _s, _n) \ macro
/openbmc/qemu/target/loongarch/
H A Dmachine.c151 VMSTATE_UINTTL_ARRAY(env.gpr, LoongArchCPU, 32),
/openbmc/qemu/target/sparc/
H A Dmachine.c177 VMSTATE_UINTTL_ARRAY(env.gregs, SPARCCPU, 8),
/openbmc/qemu/target/i386/
H A Dmachine.c1642 VMSTATE_UINTTL_ARRAY(env.regs, X86CPU, CPU_NB_REGS),
1668 VMSTATE_UINTTL_ARRAY(env.dr, X86CPU, 8),