Searched refs:VISLANDS30_IV_SRCID_CP_ECC_ERROR (Results 1 – 2 of 2) sorted by relevance
245 #define VISLANDS30_IV_SRCID_CP_ECC_ERROR 0x000000c5 /* 197 */ macro254 #define VISLANDS30_IV_SRCID_CP_ECC_ERROR 0x000000c5 /* 197 */ macro
1945 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_ECC_ERROR, in gfx_v8_0_sw_init()