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Searched refs:VGT_HOS_CNTL__TESS_MODE_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h12592 #define VGT_HOS_CNTL__TESS_MODE_MASK 0x00000003L macro
H A Dgfx_7_2_sh_mask.h15491 #define VGT_HOS_CNTL__TESS_MODE_MASK 0x3 macro
H A Dgfx_8_0_sh_mask.h17625 #define VGT_HOS_CNTL__TESS_MODE_MASK 0x3 macro
H A Dgfx_8_1_sh_mask.h18213 #define VGT_HOS_CNTL__TESS_MODE_MASK 0x3 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h17165 #define VGT_HOS_CNTL__TESS_MODE_MASK … macro
H A Dgc_9_2_1_sh_mask.h18366 #define VGT_HOS_CNTL__TESS_MODE_MASK … macro
H A Dgc_9_1_sh_mask.h18476 #define VGT_HOS_CNTL__TESS_MODE_MASK … macro
H A Dgc_9_4_3_sh_mask.h20494 #define VGT_HOS_CNTL__TESS_MODE_MASK … macro
H A Dgc_9_4_2_sh_mask.h10611 #define VGT_HOS_CNTL__TESS_MODE_MASK … macro
H A Dgc_10_1_0_sh_mask.h24680 #define VGT_HOS_CNTL__TESS_MODE_MASK … macro
H A Dgc_10_3_0_sh_mask.h22879 #define VGT_HOS_CNTL__TESS_MODE_MASK … macro