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Searched refs:VGT_GSVS_RING_OFFSET_1__OFFSET_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h12584 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK 0x00007fffL macro
H A Dgfx_7_2_sh_mask.h15839 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK 0x7fff macro
H A Dgfx_8_0_sh_mask.h17979 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK 0x7fff macro
H A Dgfx_8_1_sh_mask.h18571 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK 0x7fff macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h17366 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK macro
H A Dgc_9_2_1_sh_mask.h18567 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK macro
H A Dgc_9_1_sh_mask.h18677 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK macro
H A Dgc_9_4_3_sh_mask.h20695 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK macro
H A Dgc_9_4_2_sh_mask.h10812 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK macro
H A Dgc_10_1_0_sh_mask.h24881 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK macro
H A Dgc_10_3_0_sh_mask.h23078 #define VGT_GSVS_RING_OFFSET_1__OFFSET_MASK macro