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Searched refs:VGA_WR08 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/video/fbdev/nvidia/
H A Dnv_setup.c72 VGA_WR08(par->PVIO, VGA_GFX_I, index); in NVWriteGr()
73 VGA_WR08(par->PVIO, VGA_GFX_D, value); in NVWriteGr()
77 VGA_WR08(par->PVIO, VGA_GFX_I, index); in NVReadGr()
458 VGA_WR08(par->PCIO, 0x03D4, 0x44); in NVCommonSetup()
461 VGA_WR08(par->PCIO, 0x03D5, 3); in NVCommonSetup()
465 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVCommonSetup()
472 VGA_WR08(par->PCIO, 0x03D4, 0x44); in NVCommonSetup()
473 VGA_WR08(par->PCIO, 0x03D5, 0); in NVCommonSetup()
477 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVCommonSetup()
611 VGA_WR08(par->PCIO, 0x03D4, 0x44); in NVCommonSetup()
[all …]
H A Dnv_hw.c61 VGA_WR08(par->PCIO, 0x3D4, 0x1F); in NVLockUnlock()
64 VGA_WR08(par->PCIO, 0x3D4, 0x11); in NVLockUnlock()
70 VGA_WR08(par->PCIO, 0x3D5, cr11); in NVLockUnlock()
79 VGA_WR08(par->PCIO, 0x3D4, 0x31); in NVShowHideCursor()
1556 VGA_WR08(par->PCIO, 0x03D4, 0x19); in NVLoadStateExt()
1558 VGA_WR08(par->PCIO, 0x03D4, 0x1A); in NVLoadStateExt()
1560 VGA_WR08(par->PCIO, 0x03D4, 0x25); in NVLoadStateExt()
1562 VGA_WR08(par->PCIO, 0x03D4, 0x28); in NVLoadStateExt()
1564 VGA_WR08(par->PCIO, 0x03D4, 0x2D); in NVLoadStateExt()
1566 VGA_WR08(par->PCIO, 0x03D4, 0x1C); in NVLoadStateExt()
[all …]
H A Dnv_local.h70 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i))) macro
H A Dnvidia.c436 VGA_WR08(par->PCIO, 0x03D4, 0x1C); in nvidia_calc_regs()
636 VGA_WR08(par->PCIO, 0x03D4, 0x44); in nvidiafb_set_par()
637 VGA_WR08(par->PCIO, 0x03D5, par->ModeReg.crtcOwner); in nvidiafb_set_par()
651 VGA_WR08(par->PCIO, 0x3d4, 0x46); in nvidiafb_set_par()
654 VGA_WR08(par->PCIO, 0x3d5, tmp); in nvidiafb_set_par()
/openbmc/linux/drivers/video/fbdev/riva/
H A Drivafb-i2c.c33 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
41 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setscl()
42 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); in riva_gpio_setscl()
51 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
59 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base + 1); in riva_gpio_setsda()
60 VGA_WR08(par->riva.PCIO, 0x3d5, val | 0x1); in riva_gpio_setsda()
69 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getscl()
82 VGA_WR08(par->riva.PCIO, 0x3d4, chan->ddc_base); in riva_gpio_getsda()
H A Driva_hw.c92 VGA_WR08(chip->PCIO, 0x3D4, 0x11); in vgaLockUnlock()
96 VGA_WR08(chip->PCIO, 0x3D5, cr11); in vgaLockUnlock()
104 VGA_WR08(chip->PVIO, 0x3C4, 0x06); in nv3LockUnlock()
114 VGA_WR08(chip->PCIO, 0x3D4, 0x1F); in nv4LockUnlock()
129 VGA_WR08(chip->PCIO, 0x3D4, 0x31); in ShowHideCursor()
1650 VGA_WR08(chip->PCIO, 0x03D4, 0x19); in LoadStateExt()
1652 VGA_WR08(chip->PCIO, 0x03D4, 0x1A); in LoadStateExt()
1818 VGA_WR08(chip->PCIO, 0x3D4, 0x0D); VGA_WR08(chip->PCIO, 0x3D5, offset); in SetStartAddress3()
1820 VGA_WR08(chip->PCIO, 0x3D4, 0x0C); VGA_WR08(chip->PCIO, 0x3D5, offset); in SetStartAddress3()
1830 VGA_WR08(chip->PCIO, 0x3C0, 0x13); in SetStartAddress3()
[all …]
H A Dfbdev.c382 VGA_WR08(par->riva.PCIO, 0x3d4, index); in CRTCout()
383 VGA_WR08(par->riva.PCIO, 0x3d5, val); in CRTCout()
397 VGA_WR08(par->riva.PVIO, 0x3cf, val); in GRAout()
411 VGA_WR08(par->riva.PVIO, 0x3c5, val); in SEQout()
425 VGA_WR08(par->riva.PCIO, 0x3c0, val); in ATTRout()
437 VGA_WR08(par->riva.PVIO, 0x3c2, val); in MISCout()
536 VGA_WR08(chip->PDIO, 0x3c8, regnum); in riva_wclut()
537 VGA_WR08(chip->PDIO, 0x3c9, red); in riva_wclut()
538 VGA_WR08(chip->PDIO, 0x3c9, green); in riva_wclut()
539 VGA_WR08(chip->PDIO, 0x3c9, blue); in riva_wclut()
[all …]
H A Driva_hw.h85 #define VGA_WR08(p,i,d) (writeb((d), (void __iomem *)(p) + (i))) macro