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Searched refs:VEYRON_V1_MIMPID (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu_vendorid.h7 #define VEYRON_V1_MIMPID 0x111 macro
H A Dcpu.c531 cpu->cfg.mimpid = VEYRON_V1_MIMPID; in rv64_veyron_v1_cpu_init()