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Searched refs:VC3_MPAR_tWR (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h38 #define VC3_MPAR_tWR 5 macro
61 #define VC3_MPAR_tWR 5 macro
84 #define VC3_MPAR_tWR 5 macro
107 #define VC3_MPAR_tWR 5 macro
130 #define VC3_MPAR_tWR 5 macro
156 #define VC3_MPAR_tWR 4 macro
210 ((VC3_MPAR_tWR - 1) << 9)
225 #define MSCC_MEMPARM_MR0 ((VC3_MPAR_RL - 4) << 4) | ((VC3_MPAR_tWR - 4) << 9)
257 VC3_MPAR_tWR - 1) | \
294 VC3_MPAR_tWR) | \