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Searched refs:VBIOSSMC_MSG_SetDppclkFreq (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
H A Drn_clk_mgr_vbios_smu.c56 #define VBIOSSMC_MSG_SetDppclkFreq 0x7 macro
224 VBIOSSMC_MSG_SetDppclkFreq, in rn_vbios_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/
H A Ddcn301_smu.c53 #define VBIOSSMC_MSG_SetDppclkFreq 0x6 macro
212 VBIOSSMC_MSG_SetDppclkFreq, in dcn301_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn316/
H A Ddcn316_smu.c70 #define VBIOSSMC_MSG_SetDppclkFreq 0x06 ///< Set DPP clock frequency in MHZ macro
226 VBIOSSMC_MSG_SetDppclkFreq, in dcn316_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/
H A Ddcn31_smu.c54 #define VBIOSSMC_MSG_SetDppclkFreq 0x6 macro
239 VBIOSSMC_MSG_SetDppclkFreq, in dcn31_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn315/
H A Ddcn315_smu.c85 #define VBIOSSMC_MSG_SetDppclkFreq 0x06 ///< Set DPP clock frequency in MHZ macro
252 VBIOSSMC_MSG_SetDppclkFreq, in dcn315_smu_set_dppclk()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/
H A Ddcn314_smu.c69 #define VBIOSSMC_MSG_SetDppclkFreq 0x6 macro
259 VBIOSSMC_MSG_SetDppclkFreq, in dcn314_smu_set_dppclk()