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Searched refs:UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra210.c200 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE BIT(24) macro
2888 reg |= UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE; in tegra210_utmi_param_configure()
2987 if (!(reg & UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE)) in tegra210_init_pllu()
H A Dclk-pll.c212 #define UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE BIT(24) macro
1837 value |= UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE; in clk_pllu_tegra114_enable()