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Searched refs:USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/mx7/
H A Dclock.c561 target = CLK_ROOT_ON | USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK | in init_clk_esdhc()
566 target = CLK_ROOT_ON | USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK | in init_clk_esdhc()
571 target = CLK_ROOT_ON | USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK | in init_clk_esdhc()
/openbmc/u-boot/arch/arm/include/asm/arch-mx7/
H A Dcrm_regs.h2430 #define USDHC1_CLK_ROOT_FROM_PLL_SYS_PFD0_392M_CLK 0x01000000 macro