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Searched refs:UPDATE_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/arc/plat-hsdk/
H A Dplatform.c139 #define UPDATE_VAL 1 macro
213 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_0)); in hsdk_init_memory_bridge_axi_dmac()
219 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_DMAC_1)); in hsdk_init_memory_bridge_axi_dmac()
237 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_CORE)); in hsdk_init_memory_bridge()
243 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_RTT)); in hsdk_init_memory_bridge()
249 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_AXI_TUN)); in hsdk_init_memory_bridge()
255 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_VIDEO)); in hsdk_init_memory_bridge()
261 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_AUDIO)); in hsdk_init_memory_bridge()
267 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_USB_HOST)); in hsdk_init_memory_bridge()
273 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_ETHERNET)); in hsdk_init_memory_bridge()
[all …]
/openbmc/u-boot/board/synopsys/hsdk/
H A Dhsdk.c439 #define UPDATE_VAL 1 macro
487 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_CORE)); in init_memory_bridge()
493 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HS_RTT)); in init_memory_bridge()
499 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_AXI_TUN)); in init_memory_bridge()
505 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_VIDEO)); in init_memory_bridge()
511 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_HDMI_AUDIO)); in init_memory_bridge()
517 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_USB_HOST)); in init_memory_bridge()
523 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_ETHERNET)); in init_memory_bridge()
529 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_SDIO)); in init_memory_bridge()
535 writel(UPDATE_VAL, CREG_AXI_M_UPDT(M_GPU)); in init_memory_bridge()
[all …]