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Searched refs:UNIPHY_PLL_CONTROL2__UNIPHY_PDIV_SEL_MASK (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9241 #define UNIPHY_PLL_CONTROL2__UNIPHY_PDIV_SEL_MASK 0xe0000000L macro
H A Ddce_8_0_sh_mask.h4457 #define UNIPHY_PLL_CONTROL2__UNIPHY_PDIV_SEL_MASK 0xe0000000 macro
H A Ddce_10_0_sh_mask.h12015 #define UNIPHY_PLL_CONTROL2__UNIPHY_PDIV_SEL_MASK 0xe0000000 macro
H A Ddce_11_0_sh_mask.h11827 #define UNIPHY_PLL_CONTROL2__UNIPHY_PDIV_SEL_MASK 0xe0000000 macro