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Searched refs:UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h9204 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x00000010 macro
H A Ddce_8_0_sh_mask.h4422 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x10 macro
H A Ddce_10_0_sh_mask.h11980 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x10 macro
H A Ddce_11_0_sh_mask.h11792 #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x10 macro