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Searched refs:UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2823 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK 0x8000 macro
H A Ddce_11_0_sh_mask.h2797 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK 0x8000 macro
H A Ddce_11_2_sh_mask.h3037 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK 0x8000 macro
H A Ddce_12_0_sh_mask.h9152 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h43195 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_1_0_sh_mask.h39900 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_3_2_1_sh_mask.h39852 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_3_1_2_sh_mask.h44573 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_3_1_5_sh_mask.h42676 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_3_1_6_sh_mask.h45631 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42481 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48674 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49047 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h3601 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddpcs_4_2_2_sh_mask.h3722 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro
H A Ddpcs_4_2_3_sh_mask.h3750 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL3_INVERT_MASK … macro