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Searched refs:UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2822 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT 0xe macro
H A Ddce_11_0_sh_mask.h2796 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT 0xe macro
H A Ddce_11_2_sh_mask.h3036 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT 0xe macro
H A Ddce_12_0_sh_mask.h9142 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h43185 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h39847 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h39890 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h44567 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h42670 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h45626 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42471 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49037 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48664 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h3595 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddpcs_4_2_2_sh_mask.h3716 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro
H A Ddpcs_4_2_3_sh_mask.h3745 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT__SHIFT … macro