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Searched refs:UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2821 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK 0x4000 macro
H A Ddce_11_0_sh_mask.h2795 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK 0x4000 macro
H A Ddce_11_2_sh_mask.h3035 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK 0x4000 macro
H A Ddce_12_0_sh_mask.h9151 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h43194 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_1_0_sh_mask.h39899 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_3_2_1_sh_mask.h39851 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_3_1_2_sh_mask.h44572 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_3_1_5_sh_mask.h42675 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_3_1_6_sh_mask.h45630 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_3_0_2_sh_mask.h42480 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_2_0_0_sh_mask.h48673 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddcn_3_0_0_sh_mask.h49046 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h3600 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddpcs_4_2_2_sh_mask.h3721 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro
H A Ddpcs_4_2_3_sh_mask.h3749 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL2_INVERT_MASK … macro