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Searched refs:UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT (Results 1 – 16 of 16) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2818 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT 0xc macro
H A Ddce_11_0_sh_mask.h2792 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT 0xc macro
H A Ddce_11_2_sh_mask.h3032 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT 0xc macro
H A Ddce_12_0_sh_mask.h9140 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_1_0_sh_mask.h43183 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h39888 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h39845 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h44565 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h42668 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h45624 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42469 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48662 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49035 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h3593 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddpcs_4_2_2_sh_mask.h3714 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro
H A Ddpcs_4_2_3_sh_mask.h3743 #define UNIPHYE_LINK_CNTL__UNIPHY_CHANNEL0_INVERT__SHIFT … macro