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Searched refs:UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2792 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT 0xd macro
H A Ddce_11_0_sh_mask.h2776 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT 0xd macro
H A Ddce_11_2_sh_mask.h3016 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT 0xd macro
H A Ddce_12_0_sh_mask.h9111 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h35866 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43154 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_3_2_1_sh_mask.h39828 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_1_0_sh_mask.h39859 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_3_1_2_sh_mask.h44546 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_3_1_5_sh_mask.h42649 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_3_1_6_sh_mask.h45607 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42440 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h49006 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48633 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_4_2_0_sh_mask.h3574 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddpcs_4_2_2_sh_mask.h3695 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro
H A Ddpcs_4_2_3_sh_mask.h3726 #define UNIPHYD_LINK_CNTL__UNIPHY_CHANNEL1_INVERT__SHIFT … macro