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Searched refs:UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2702 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT 0x4 macro
H A Ddce_11_0_sh_mask.h2716 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT 0x4 macro
H A Ddce_11_2_sh_mask.h2956 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT 0x4 macro
H A Ddce_12_0_sh_mask.h9018 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h19812 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h21167 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43061 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
H A Ddcn_1_0_sh_mask.h39766 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h35761 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42347 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48540 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h48913 #define UNIPHYA_LINK_CNTL__UNIPHY_PIXVLD_RESET__SHIFT … macro