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Searched refs:UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h2700 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h2714 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h2954 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT 0x0 macro
H A Ddce_12_0_sh_mask.h9017 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_2_0_3_sh_mask.h19811 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
H A Ddcn_3_0_3_sh_mask.h21166 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
H A Ddcn_2_1_0_sh_mask.h43060 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
H A Ddcn_1_0_sh_mask.h39765 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
H A Ddcn_3_0_1_sh_mask.h35760 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
H A Ddcn_3_0_2_sh_mask.h42346 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
H A Ddcn_2_0_0_sh_mask.h48539 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro
H A Ddcn_3_0_0_sh_mask.h48912 #define UNIPHYA_LINK_CNTL__UNIPHY_PFREQCHG__SHIFT … macro