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Searched refs:UMC_BASE__INST0_SEG5 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dnavi10_ip_offset.h776 #define UMC_BASE__INST0_SEG5 0 macro
H A Ddimgrey_cavefish_ip_offset.h956 #define UMC_BASE__INST0_SEG5 0 macro
H A Dvega20_ip_offset.h845 #define UMC_BASE__INST0_SEG5 0 macro
H A Dbeige_goby_ip_offset.h1181 #define UMC_BASE__INST0_SEG5 0 macro
H A Dvangogh_ip_offset.h1353 #define UMC_BASE__INST0_SEG5 0 macro
H A Dyellow_carp_offset.h1272 #define UMC_BASE__INST0_SEG5 0 macro
H A Darct_ip_offset.h1430 #define UMC_BASE__INST0_SEG5 0 macro
H A Daldebaran_ip_offset.h1400 #define UMC_BASE__INST0_SEG5 0 macro