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Searched refs:UFWP (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/staging/rtl8192e/rtl8192e/
H A Drtl_dm.c373 rtl92e_writeb(dev, UFWP, 1); in _rtl92e_dm_check_rate_adaptive()
951 rtl92e_writeb(dev, UFWP, 1); in rtl92e_dm_restore_state()
966 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_bb_initialgain_restore()
978 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_bb_initialgain_restore()
991 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_dm_backup_state()
1074 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_ctrl_initgain_byrssi_driver()
1105 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
1124 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
1175 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in _rtl92e_dm_ctrl_initgain_byrssi_false_alarm()
H A Dr8192E_hw.h194 UFWP = 0x318, enumerator
H A Dr8192E_phy.c925 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_init_gain()
952 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x8); in rtl92e_init_gain()
971 rtl92e_set_bb_reg(dev, UFWP, bMaskByte1, 0x1); in rtl92e_init_gain()
H A Dr8192E_dev.c488 rtl92e_writeb(dev, UFWP, 1); in _rtl92e_hwconfig()
1837 rtl92e_writeb(dev, UFWP, 1); in rtl92e_update_ratr_table()
H A Drtl_core.c1129 rtl92e_writeb(dev, UFWP, 1); in _rtl92e_if_silent_reset()
/openbmc/linux/drivers/staging/rtl8192u/
H A Dr8192U_hw.h185 UFWP = 0x318, enumerator
H A Dr8192U_dm.c360 write_nic_byte(dev, UFWP, 1); in dm_check_rate_adaptive()
1456 write_nic_byte(dev, UFWP, 1); in dm_restore_dynamic_mechanism_state()
1476 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1490 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_restore()
1502 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_bb_initialgain_backup()
1602 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_driverrssi()
1636 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite.*/ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1666 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1740 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); /* Only clear byte 1 and rewrite. */ in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
H A Dr819xU_phy.c1572 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1611 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); in InitialGainOperateWorkItemCallBack()
1640 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); in InitialGainOperateWorkItemCallBack()
H A Dr8192U_core.c1780 write_nic_byte(dev, UFWP, 1); in rtl8192_update_ratr_table()
2454 write_nic_byte(dev, UFWP, 1); in rtl8192_hwconfig()
3014 write_nic_byte(dev, UFWP, 1); in rtl819x_ifsilentreset()