Searched refs:UFCR (Results 1 – 4 of 4) sorted by relevance
| /openbmc/u-boot/board/toradex/apalis_imx6/ |
| H A D | apalis_imx6.c | 300 #define UFCR 0x90 /* FIFO Control Register */ macro
305 setbits_le32((u32 *)(UART1_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
306 setbits_le32((u32 *)(UART2_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
307 setbits_le32((u32 *)(UART4_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
308 setbits_le32((u32 *)(UART5_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
312 clrbits_le32((u32 *)(UART1_BASE + UFCR), UFCR_DCEDTE); in setup_dcemode_uart()
313 clrbits_le32((u32 *)(UART2_BASE + UFCR), UFCR_DCEDTE); in setup_dcemode_uart()
314 clrbits_le32((u32 *)(UART4_BASE + UFCR), UFCR_DCEDTE); in setup_dcemode_uart()
315 clrbits_le32((u32 *)(UART5_BASE + UFCR), UFCR_DCEDTE); in setup_dcemode_uart()
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| /openbmc/linux/drivers/tty/serial/ |
| H A D | imx.c | 44 #define UFCR 0x90 /* FIFO Control Register */ macro
1351 imx_uart_writel(sport, val, UFCR); in imx_uart_setup_ufcr()
1801 ufcr = imx_uart_readl(sport, UFCR); in imx_uart_set_termios()
1803 imx_uart_writel(sport, ufcr, UFCR); in imx_uart_set_termios()
1980 ufcr = imx_uart_readl(sport, UFCR); in imx_uart_rs485_config()
2420 u32 ufcr = imx_uart_readl(sport, UFCR); in imx_uart_probe()
2422 imx_uart_writel(sport, ufcr | UFCR_DCEDTE, UFCR); in imx_uart_probe()
2435 u32 ufcr = imx_uart_readl(sport, UFCR); in imx_uart_probe()
2437 imx_uart_writel(sport, ufcr & ~UFCR_DCEDTE, UFCR); in imx_uart_probe()
2517 imx_uart_writel(sport, sport->saved_reg[4], UFCR); in imx_uart_restore_context()
[all …]
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| /openbmc/u-boot/board/toradex/colibri_imx6/ |
| H A D | colibri_imx6.c | 261 #define UFCR 0x90 /* FIFO Control Register */ macro
266 setbits_le32((u32 *)(UART1_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
267 setbits_le32((u32 *)(UART2_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
268 setbits_le32((u32 *)(UART3_BASE + UFCR), UFCR_DCEDTE); in setup_dtemode_uart()
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| /openbmc/u-boot/arch/arm/include/asm/arch-imx/ |
| H A D | imx-regs.h | 502 #define UFCR(x) __REG2( IMX_UART1_BASE + 0x90, ((x) & 1) << 12) /* FIFO Control Register */ macro
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