Searched refs:UFCON (Results 1 – 2 of 2) sorted by relevance
47 #define UFCON 0x0008 /* FIFO Control */ macro78 {"UFCON", UFCON, 0x00000000},250 reg = (s->reg[I_(UFCON)] & UFCON_Tx_FIFO_TRIGGER_LEVEL) >> in exynos4210_uart_Tx_FIFO_trigger_level()291 if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) { in exynos4210_uart_update_irq()416 case UFCON: in exynos4210_uart_write()417 s->reg[I_(UFCON)] = val; in exynos4210_uart_write()420 s->reg[I_(UFCON)] &= ~UFCON_Rx_FIFO_RESET; in exynos4210_uart_write()425 s->reg[I_(UFCON)] &= ~UFCON_Tx_FIFO_RESET; in exynos4210_uart_write()503 if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) { in exynos4210_uart_read()557 if (s->reg[I_(UFCON)] & UFCON_FIFO_ENABLE) { in exynos4210_uart_can_receive()[all …]
74 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE) macro82 .ufcon = UFCON,89 .ufcon = UFCON,96 .ufcon = UFCON,103 .ufcon = UFCON,