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Searched refs:UDCICR0 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/usb/gadget/
H A Dpxa27x_udc.c489 writel(readl(UDCICR0) | 3 << (ep_num * 2), UDCICR0); in pio_irq_enable()
626 writel(0xffffffff, UDCICR0); in udc_enable()
698 writel(0, UDCICR0); in udc_init()
/openbmc/linux/drivers/usb/gadget/udc/
H A Dpxa27x_udc.c124 udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1)); in state_dbg_show()
331 u32 udcicr0 = udc_readl(udc, UDCICR0); in pio_irq_enable()
335 udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2))); in pio_irq_enable()
348 u32 udcicr0 = udc_readl(udc, UDCICR0); in pio_irq_disable()
352 udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2))); in pio_irq_disable()
1638 udc_writel(udc, UDCICR0, 0); in udc_disable()
1700 udc_writel(udc, UDCICR0, 0); in udc_enable()
H A Dpxa27x_udc.h23 #define UDCICR0 0x0004 /* UDC Interrupt Control Register0 */ macro
/openbmc/linux/arch/arm/mach-pxa/
H A Dpxa27x-udc.h35 #define UDCICR0 __REG(0x40600004) /* UDC Interrupt Control Register0 */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h610 #define UDCICR0 0x40600004 /* UDC Interrupt Control Register0 */ macro