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Searched refs:UARTDM_ISR (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/serial/
H A Dserial_msm.c46 #define UARTDM_ISR 0xB4 /* Interrupt status register */ macro
127 !(readl(priv->base + UARTDM_ISR) & UARTDM_ISR_TX_READY)) in msm_serial_putc()
/openbmc/linux/arch/arm/include/debug/
H A Dmsm.S29 @ wait for TXREADY in UARTDM_ISR