Searched refs:UART5_DIV (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | nuvoton,ma35d1-clk.h | 159 #define UART5_DIV 144 macro
|
| /openbmc/linux/drivers/clk/nxp/ |
| H A D | clk-lpc32xx.c | 1303 LPC32XX_DEFINE_CLK(UART5_DIV, UART5_CLK_CTRL,
1306 LPC32XX_DEFINE_COMPOSITE(UART5, UART5_MUX, UART5_DIV, UART5_GATE),
|
| /openbmc/linux/drivers/clk/nuvoton/ |
| H A D | clk-ma35d1.c | 812 hws[UART5_DIV] = ma35d1_clk_divider(dev, "uart5_div", "uart5_mux", in ma35d1_clocks_probe()
|