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Searched refs:U2 (Results 1 – 25 of 29) sorted by relevance

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/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dpcie_slots.hpp18 U2, enumerator
31 {SlotTypes::U2, "U2"},
H A Dpcie_device.hpp36 U2, enumerator
89 {SlotType::U2, "U2"},
H A Ddrive.hpp78 U2, enumerator
175 {FormFactor::U2, "U2"},
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,xsphy.yaml57 if only U2 ports provided, shouldn't use the property.
113 The value of slew rate calibrate (U2 phy)
120 The selection of VRT reference voltage (U2 phy)
127 The selection of HS_TX TERM reference voltage (U2 phy)
134 The selection of Internal Resistor (U2/U3 phy)
H A Dmediatek,tphy.yaml171 - description: internal R efuse for U2 PHY or U3/PCIe PHY
176 Available only for U2 PHY or U3/PCIe PHY of version 2/3, these
190 The value of slew rate calibrate (U2 phy)
197 The selection of VRT reference voltage (U2 phy)
204 The selection of HS_TX TERM reference voltage (U2 phy)
211 The selection of internal resistor (U2 phy)
218 The selection of disconnect threshold (U2 phy)
228 8.3% etc. (U2 phy)
/openbmc/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-io1v8.dtsi9 /* Enpirion EP3A8LQI U2 on the DHCOR */
/openbmc/qemu/tests/qemu-iotests/sample_images/
H A Dtest-disk2vhd.vhdx.bz21vhdxfiled�2�
/openbmc/bmcweb/redfish-core/include/utils/
H A Dpcie_util.hpp93 return pcie_slots::SlotTypes::U2; in dbusSlotTypeToRf()
/openbmc/linux/drivers/net/wireless/legacy/
H A DKconfig39 Buffalo WLI-U2-KG125S
/openbmc/linux/drivers/parisc/
H A DKconfig24 bool "U2/Uturn I/O MMU"
29 U2/Uturn chip in "Virtual Mode" and use the I/O MMU.
/openbmc/linux/Documentation/ABI/testing/
H A Dsysfs-bus-usb-lvstest24 Set "U2 timeout" for the downstream port where Link Layer
H A Dsysfs-bus-usb115 and U2 exit latencies have been set in the BOS descriptor; if
121 or not USB3 hardware LPM U1 or U2 is enabled for the device.
/openbmc/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-boneblue.dts176 AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4) /* (U2) lcd_data9.uart5_rxd */
527 "UART5_RX", /* U2 */
/openbmc/linux/arch/arm/boot/dts/marvell/
H A Ddove-cm-a510.dtsi66 * U2: 2 dual-role USB2.0 ports
/openbmc/linux/Documentation/admin-guide/media/
H A Dem28xx-cardlist.rst270 - Kaiomy TVnPC U2
/openbmc/linux/Documentation/devicetree/bindings/usb/
H A Dsnps,dwc3.yaml150 description: Set if we enable P3 OK for U2/SS Inactive quirk
211 description: Set if link entering into U2 needs to be disabled
/openbmc/linux/Documentation/scsi/
H A Daic7xxx.rst110 AHA-2940U2 OEM aic7891 PCI/64
115 AHA-2930U2 aic7890 PCI/32 LVD-HD68F SE-HD50F
/openbmc/linux/drivers/pinctrl/aspeed/
H A Dpinctrl-aspeed-g5.c714 #define U2 91 macro
716 SIG_EXPR_LIST_DECL_SINGLE(U2, VPIHS, VPI24, VPI_24_RSVD_DESC, U2_DESC, COND2);
717 SIG_EXPR_LIST_DECL_SINGLE(U2, NRI1, NRI1, U2_DESC, COND2);
718 PIN_DECL_2(U2, GPIOL3, VPIHS, NRI1);
719 FUNC_GROUP_DECL(NRI1, U2);
929 FUNC_GROUP_DECL(VPI24, T1, U2, P4, P3, Y1, AB2, AA1, Y2, AA2, P5, R5, T5, V3,
2098 ASPEED_PINCTRL_PIN(U2),
H A Dpinctrl-aspeed-g4.c630 #define U2 77 macro
631 SSSF_PIN_DECL(U2, GPIOJ5, VGAVS, SIG_DESC_SET(SCU84, 13));
2094 ASPEED_PINCTRL_PIN(U2),
/openbmc/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-odroid-common.dtsi3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
/openbmc/linux/arch/arm64/boot/dts/ti/
H A Dk3-am654-base-board.dts182 AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
H A Dk3-am65-iot2050-common.dtsi186 /* (U2) MCU_OSPI0_DQS */
H A Dk3-j721e-common-proc-board.dts266 J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */
/openbmc/linux/Documentation/driver-api/usb/
H A Dpower-management.rst530 lower power state(L1 for usb2.0 devices, or U1/U2 for usb3.0 devices),
554 and U2 exit latencies have been set in the BOS
559 indicating whether or not USB3 hardware LPM U1 or U2
H A Ddwc3.rst211 ``U2``, ``U3``, ``SS.Disabled``, ``RX.Detect``, ``SS.Inactive``,

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