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/openbmc/linux/Documentation/networking/device_drivers/ethernet/freescale/
H A Ddpaa.rst44 -Ports / Tx Rx \ ... / Tx Rx \
62 |Rx | |Rx | |Tx | |Tx | | driver |
85 Tx Cnf FQ Tx confirmation FQs
86 Tx FQs transmission frame queues
142 On Tx, all transmitted frames are returned to the driver through Tx
165 default, only one traffic class is enabled and the lowest priority Tx queues
184 Traffic coming on the DPAA Rx queues or on the DPAA Tx confirmation
250 - Tx packets count per CPU
251 - Tx confirmed packets count per CPU
252 - Tx S/G frames count per CPU
[all …]
/openbmc/linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/
H A Dfsl,cpm1-tsa.yaml59 The hardware can use four dedicated pins for Tx clock, Tx sync, Rx
60 clock and Rx sync or use only two pins, Tx/Rx clock and Tx/Rx sync.
93 Indicates the delay between the Tx sync and the first bit of the Tx
119 A list of tuple that indicates the Tx or Rx time-slots routes.
127 The source (Tx) or destination (Rx) serial interface
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra210-admaif.yaml13 Tx channel and ADMA channel receiving data from AHUB pairs with
66 DMA channel specifiers, equally divided for Tx and Rx.
74 Should be "tx1", "tx2" ... "tx10" for DMA Tx channel
82 DMA channel specifiers, equally divided for Tx and Rx.
90 Should be "tx1", "tx2" ... "tx20" for DMA Tx channel
/openbmc/linux/drivers/net/ethernet/chelsio/inline_crypto/
H A DKconfig23 Enable inline TLS support for Tx and Rx.
29 tristate "Chelsio IPSec XFRM Tx crypto offload"
35 Enable inline IPsec support for Tx.
/openbmc/linux/Documentation/devicetree/bindings/net/can/
H A Dbosch,m_can.yaml57 and each element(e.g Rx FIFO or Tx Buffer and etc) number
75 Tx Event FIFO 0-32 elements / 0-64 words
76 Tx Buffers 0-32 elements / 0-576 words
101 - description: Tx Event FIFO 0-32 elements / 0-64 words
104 - description: Tx Buffers 0-32 elements / 0-576 words
H A Dxilinx,can.yaml39 description: CAN Tx fifo depth (Zynq, Axi CAN).
47 description: CAN Tx mailbox buffer count (CAN FD)
/openbmc/linux/Documentation/networking/device_drivers/ethernet/amazon/
H A Dena.rst25 processing by providing multiple Tx/Rx queue pairs (the maximum number
27 interrupt vector per Tx/Rx queue pair, adaptive interrupt moderation,
50 ena_eth_com.[ch] Tx/Rx data path.
124 I/O operations are based on Tx and Rx Submission Queues (Tx SQ and Rx
131 The ENA driver supports two Queue Operation modes for Tx SQs:
134 In this mode the Tx SQs reside in the host's memory. The ENA
135 device fetches the ENA Tx descriptors and packet data from host
182 <interface name>-Tx-Rx-<queue index>
263 Tx section in DATA PATH
274 out-of-order Tx completions.
[all …]
/openbmc/linux/Documentation/networking/device_drivers/ethernet/3com/
H A D3c509.rst165 Tx Carrier Errors Reported in /proc/net/dev
169 If an EtherLink III appears to transmit packets, but the "Tx carrier errors"
170 field in /proc/net/dev increments as quickly as the Tx packet count, you
197 0x02 Tx overrun, or Rx underrun
198 0x04 Tx complete
199 0x08 Tx FIFO room available
206 The bits in the transmit (Tx) status word are:
214 0x10 Tx underrun (not enough PCI bus bandwidth).
215 0x20 Tx jabber.
216 0x40 Tx interrupt requested.
[all …]
/openbmc/linux/Documentation/networking/
H A Dnetif-msg.rst29 - 4 Tx and Rx frame error messages, and abnormal driver operation
30 - 5 Tx packet queue information, interrupt events.
31 - 6 Status on each completed Tx packet and received Rx packets
32 - 7 Initial contents of Tx and Rx packets
H A Dnapi.rst23 of event (packet Rx and Tx) processing.
31 handler. The method will typically free Tx packets that have been
64 argument - drivers can process completions for any number of Tx
71 skb Tx processing should happen regardless of the ``budget``, but if
77 skb Tx completions and no Rx or XDP packets.
161 (queue pair is a set of a single Rx and single Tx queue).
164 or Rx and Tx queues can be serviced by separate NAPI instances on a single
173 to utilize 3 interrupts, 2 Rx and 2 Tx queues.
H A Dethtool-netlink.rst1017 ``ETHTOOL_A_COALESCE_TX_USECS_LOW`` u32 delay (us), low Tx
1018 ``ETHTOOL_A_COALESCE_TX_MAX_FRAMES_LOW`` u32 max packets, low Tx
1022 ``ETHTOOL_A_COALESCE_TX_USECS_HIGH`` u32 delay (us), high Tx
1027 ``ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES`` u32 max aggr size, Tx
1082 ``ETHTOOL_A_COALESCE_TX_USECS_LOW`` u32 delay (us), low Tx
1092 ``ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES`` u32 max aggr size, Tx
1182 ``ETHTOOL_A_EEE_TX_LPI_ENABLED`` bool Tx lpi enabled
1183 ``ETHTOOL_A_EEE_TX_LPI_TIMER`` u32 Tx lpi timeout (in us)
1204 ``ETHTOOL_A_EEE_TX_LPI_ENABLED`` bool Tx lpi enabled
1205 ``ETHTOOL_A_EEE_TX_LPI_TIMER`` u32 Tx lpi timeout (in us)
[all …]
/openbmc/libmctp/docs/bindings/
H A Dvendor-ibm-astlpc.md244 For all defined versions, only a single MCTP packet is present in the Rx and Tx
250 transmission unit. The Rx and Tx buffers must be sized to accommodate packets up
273 and Tx buffers to be considered valid:
305 | 0x01 | Tx Begin |
360 - Only the host may write to the Tx buffer described in the control area
364 1. The Tx side writes the packet to its Tx buffer
365 2. The Tx side sends a `Tx Begin` message, indicating that the buffer ownership
369 ownership is transferred back to the Tx side.
414 | 3 | ✓ | ✓ | ✓ | The host writes the packet data and medium-specific metadata to its Tx a…
415 | 4 | ✓ | ✓ | ✓ | The host sends the `Tx Begin` command, transferring ownership of its Tx …
[all …]
/openbmc/linux/Documentation/devicetree/bindings/net/
H A Dsff,sfp.yaml55 signal, active (Tx disable) high
67 GPIO phandle and a specifier of the Tx Signaling Rate Select (AKA RS1)
68 output gpio signal (SFP+ only), low - low Tx rate, high - high Tx rate. Must
H A Damd-xgbe.txt8 - SerDes Rx/Tx registers
28 - amd,per-channel-interrupt: Indicates that Rx and Tx complete will generate
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-dhcom-drc02.dtsi14 * pins SD3_DAT0 and SD3_DAT1 are muxed as can2 Tx and Rx. The signals for can2
15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
72 * Due to the use of can2 the signals for can2 Tx and Rx are routed to
110 * can2 Tx and Rx.
/openbmc/linux/Documentation/networking/device_drivers/ethernet/huawei/
H A Dhinic.rst17 HiNIC devices support MSI-X interrupt vector for each Tx/Rx queue and
104 Tx Queues - Logical Tx Queues that use the HW Send Queues for transmit.
105 The Logical Tx queue is not dependent on the format of the HW Send Queue.
112 hinic_dev - de/constructs the Logical Tx and Rx Queues.
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-sm8350.yaml30 - description: UFS card Tx symbol 0 clock source (Optional clock)
33 - description: UFS phy Tx symbol 0 clock source (Optional clock)
/openbmc/linux/Documentation/devicetree/bindings/soc/ti/
H A Dkeystone-navigator-dma.txt46 - Tx DMA channel configuration register region (txchan).
48 - Tx DMA channel Scheduler configuration register region (txsched).
57 - ti,loop-back: To loopback Tx streaming I/F to Rx streaming I/F. Used for
/openbmc/u-boot/doc/device-tree-bindings/net/
H A Daltera_tse.txt10 "tx_csr": xDMA Tx dispatcher control and status space region
11 "tx_desc": MSGDMA Tx dispatcher descriptor space region
19 "tx_irq": xDMA Tx dispatcher interrupt
/openbmc/linux/Documentation/hwmon/
H A Dfam15h_power.rst86 * Tx/Ty:
104 Jx = value read from CpuSwPwrAcc and Tx = value read from PTSC.
117 PwrCPUave = N * Jdelta * 1000 / (Ty - Tx)
/openbmc/linux/Documentation/devicetree/bindings/ata/
H A Dsnps,dwc-ahci-common.yaml31 PM-alive clock, RxOOB detection clock, embedded PHYs reference (Rx/Tx)
98 description: Maximal size of Tx DMA transactions in FIFO words
/openbmc/linux/drivers/net/wireless/marvell/mwifiex/
H A DREADME111 num_tx_pkts_dropped = <number of Tx packets dropped by driver>
113 num_tx_pkts_err = <number of Tx packets failed to send to device>
125 tx_buf_size = <current Tx buffer size>
126 curr_tx_buf_size = <current Tx buffer size>
134 num_tx_timeout = <number of Tx timeout>
161 tx_pending = <number of Tx packet pending>
/openbmc/linux/Documentation/devicetree/bindings/phy/
H A Dphy-miphy365x.txt36 - st,pcie-tx-pol-inv : Bool property to invert the polarity PCIe Tx (Txn/Txp)
37 - st,sata-tx-pol-inv : Bool property to invert the polarity SATA Tx (Txn/Txp)
/openbmc/linux/Documentation/trace/
H A Dhisi-ptt.rst70 1. Tx Path QoS Control
76 - qos_tx_cpl: weight of Tx completion TLPs
77 - qos_tx_np: weight of Tx non-posted TLPs
78 - qos_tx_p: weight of Tx posted TLPs
90 2. Tx Path Buffer Control
96 - tx_alloc_buf_level: watermark of Tx requested
99 type. Rx means the inbound while Tx means outbound. The packets will
/openbmc/linux/Documentation/sound/soc/
H A Ddai.rst26 I2S is a common 4 wire DAI used in HiFi, STB and portable devices. The Tx and
52 to synchronise the link while the Tx and Rx lines are used to transmit and

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