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Searched refs:TYPE_RISCV_BARE_CPU (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dcpu-qom.h27 #define TYPE_RISCV_BARE_CPU "riscv-bare-cpu" macro
H A Dcpu.c431 if (object_dynamic_cast(OBJECT(cpu), TYPE_RISCV_BARE_CPU) != NULL) { in set_satp_mode_default_map()
2911 .parent = TYPE_RISCV_BARE_CPU, \
2920 .parent = TYPE_RISCV_BARE_CPU, \
2949 .name = TYPE_RISCV_BARE_CPU,