Home
last modified time | relevance | path

Searched refs:TX1 (Results 1 – 20 of 20) sorted by relevance

/openbmc/qemu/target/riscv/
H A Dvector_internals.h136 /* (TD, T1, T2, TX1, TX2) */
181 #define OPIVV2(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \ argument
184 TX1 s1 = *((T1 *)vs1 + HS1(i)); \
207 * (TX1)(T1)s1 expands the operator type of widen or narrow operations.
209 #define OPIVX2(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \ argument
213 *((TD *)vd + HD(i)) = OP(s2, (TX1)(T1)s1); \
231 /* (TD, T1, T2, TX1, TX2) */
H A Dvector_helper.c853 /* (TD, T1, T2, TX1, TX2) */
1887 #define OPIVV3(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \
1890 TX1 s1 = *((T1 *)vs1 + HS1(i)); \ argument
1933 #define OPIVX3(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \
1938 *((TD *)vd + HD(i)) = OP(s2, (TX1)(T1)s1, d); \
2138 #define OPIVV2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS1, HS2, OP) \
2143 TX1 s1 = *((T1 *)vs1 + HS1(i)); \
2266 #define OPIVX2_RM(NAME, TD, T1, T2, TX1, TX2, HD, HS2, OP) \
2272 *((TD *)vd + HD(i)) = OP(env, vxrm, s2, (TX1)(T1)s1); \
3058 #define OPFVV2(NAME, TD, T1, T2, TX1, TX in RVVCALL()
1936 OPIVX3(NAME,TD,T1,T2,TX1,TX2,HD,HS2,OP) global() argument
2141 OPIVV2_RM(NAME,TD,T1,T2,TX1,TX2,HD,HS1,HS2,OP) global() argument
2269 OPIVX2_RM(NAME,TD,T1,T2,TX1,TX2,HD,HS2,OP) global() argument
3061 OPFVV2(NAME,TD,T1,T2,TX1,TX2,HD,HS1,HS2,OP) RVVCALL() argument
3107 OPFVF2(NAME,TD,T1,T2,TX1,TX2,HD,HS2,OP) global() argument
3342 OPFVV3(NAME,TD,T1,T2,TX1,TX2,HD,HS1,HS2,OP) RVVCALL() argument
3374 OPFVF3(NAME,TD,T1,T2,TX1,TX2,HD,HS2,OP) RVVCALL() argument
[all...]
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A DKconfig24 bool "NVIDIA Tegra210 P2371-2180 (Jetson TX1) board"
27 P2371-2180 (Jetson TX1 developer kit) is a P2180 CPU board married
/openbmc/linux/sound/soc/tegra/
H A Dtegra210_ahub.c148 DAI(ADX1 TX1),
153 DAI(ADX2 TX1),
168 DAI(MIXER1 TX1),
253 DAI(ADX1 TX1),
258 DAI(ADX2 TX1),
263 DAI(ADX3 TX1),
268 DAI(ADX4 TX1),
283 DAI(MIXER1 TX1),
290 DAI(ASRC1 TX1),
/openbmc/linux/arch/arm64/boot/dts/amd/
H A Damd-seattle-xgbe-b.dtsi66 <0 0xe1240c00 0 0x00400>, /* SERDES RX/TX1 */
/openbmc/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210-p2371-2180.dts8 model = "NVIDIA Jetson TX1 Developer Kit";
1382 label = "NVIDIA Jetson TX1 APE";
H A Dtegra210-p2180.dtsi7 model = "NVIDIA Jetson TX1";
H A Dtegra210-p2597.dtsi1351 nvidia,model = "NVIDIA Jetson TX1 HDA";
/openbmc/linux/arch/powerpc/boot/dts/
H A Deiger.dts135 /*COAL TX1*/ 0x19 0x2
H A Dredwood.dts131 /*COAL TX1*/ 0x19 0x2
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a779f0.c138 #define IP1SR0_23_20 FM(MSIOF0_TXD) FM(HTX3) FM(TX1) F_(0, 0) F_(0, 0) F_(0, 0) F_(0, 0) F_(…
395 PINMUX_IPSR_GPSR(IP1SR0_23_20, TX1),
H A Dpfc-r8a77990.c185 #define GPSR5_6 F_(TX1, IP12_3_0)
316 #define IP12_3_0 FM(TX1) FM(HTX2_B) FM(SSI_WS9_B) FM(AUDIO_CLKOUT3_B) F_(0, 0) F_(0, 0) F_(0, …
1130 PINMUX_IPSR_GPSR(IP12_3_0, TX1),
H A Dpfc-r8a7792.c463 PINMUX_SINGLE(TX1),
H A Dpfc-r8a7779.c782 PINMUX_IPSR_GPSR(IP1_28_25, TX1),
H A Dpfc-r8a7790.c1628 PINMUX_IPSR_MSEL(IP14_24_22, TX1, SEL_SCIF1_0),
H A Dpfc-r8a7791.c940 PINMUX_IPSR_MSEL(IP2_15_13, TX1, SEL_SCIF1_0),
/openbmc/u-boot/drivers/pinctrl/renesas/
H A Dpfc-r8a77990.c160 #define GPSR5_6 F_(TX1, IP12_3_0)
291 #define IP12_3_0 FM(TX1) FM(HTX2_B) FM(SSI_WS9_B) FM(AUDIO_CLKOUT3_B) F_(0, 0) F_(0, 0) F_(0, …
1100 PINMUX_IPSR_GPSR(IP12_3_0, TX1),
H A Dpfc-r8a7792.c456 PINMUX_SINGLE(TX1),
H A Dpfc-r8a7791.c915 PINMUX_IPSR_MSEL(IP2_15_13, TX1, SEL_SCIF1_0),
H A Dpfc-r8a7790.c1622 PINMUX_IPSR_MSEL(IP14_24_22, TX1, SEL_SCIF1_0),