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Searched refs:TURBOSPARC_ICENABLE (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/sparc/include/asm/
H A Dturbosparc.h41 #define TURBOSPARC_ICENABLE 0x00000200 /* Enable instruction cache */ macro
/openbmc/linux/arch/sparc/mm/
H A Dsrmmu.c1320 mreg &= ~(TURBOSPARC_ICENABLE | TURBOSPARC_DCENABLE); in poke_turbosparc()
1348 mreg |= (TURBOSPARC_ICENABLE | TURBOSPARC_DCENABLE); /* I & D caches on */ in poke_turbosparc()