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Searched refs:TTBCR_IRGN0_WBNWA (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/lib/
H A Dcache-cp15.c137 reg |= TTBCR_ORGN0_WBNWA | TTBCR_IRGN0_WBNWA; in mmu_setup()
/openbmc/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dcpu.c55 #define TTBCR_IRGN0_WBNWA (3 << 8) macro
/openbmc/u-boot/arch/arm/include/asm/
H A Dsystem.h430 #define TTBCR_IRGN0_WBNWA (3 << 8) macro