Searched refs:TRCCNTVRn (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/drivers/hwtracing/coresight/ |
H A D | coresight-cfg-afdo.c | 46 .offset = TRCCNTVRn(0), 64 .offset = TRCCNTVRn(1),
|
H A D | coresight-etm4x-cfg.c | 118 (offset <= TRCCNTVRn((ETMv4_MAX_CNTR - 1)))) { in etm4_cfg_map_reg_offset() 125 CHECKREGIDX(TRCCNTVRn(0), cntr_val, idx, off_mask); in etm4_cfg_map_reg_offset()
|
H A D | coresight-etm4x.h | 54 #define TRCCNTVRn(n) (0x160 + (n * 4)) /* n = 0-3 */ macro 304 CASE_##op((val), TRCCNTVRn(0)) \ 305 CASE_##op((val), TRCCNTVRn(1)) \ 306 CASE_##op((val), TRCCNTVRn(2)) \ 307 CASE_##op((val), TRCCNTVRn(3)) \
|
H A D | coresight-etm4x-core.c | 465 etm4x_relaxed_write32(csa, config->cntr_val[i], TRCCNTVRn(i)); in etm4_enable_hw() 919 etm4x_relaxed_read32(csa, TRCCNTVRn(i)); in etm4_disable_hw() 1720 state->trccntvr[i] = etm4x_read32(csa, TRCCNTVRn(i)); in __etm4_cpu_save() 1852 etm4x_relaxed_write32(csa, state->trccntvr[i], TRCCNTVRn(i)); in __etm4_cpu_restore()
|
/openbmc/qemu/target/arm/ |
H A D | cpregs.h | 541 FIELD(HDFGRTR_EL2, TRCCNTVRn, 37, 1) 605 FIELD(HDFGWTR_EL2, TRCCNTVRn, 37, 1)
|
/openbmc/linux/arch/arm64/kvm/ |
H A D | emulate-nested.c | 1301 SR_FGT(SYS_TRCCNTVR(0), HDFGRTR, TRCCNTVRn, 1), 1302 SR_FGT(SYS_TRCCNTVR(1), HDFGRTR, TRCCNTVRn, 1), 1303 SR_FGT(SYS_TRCCNTVR(2), HDFGRTR, TRCCNTVRn, 1), 1304 SR_FGT(SYS_TRCCNTVR(3), HDFGRTR, TRCCNTVRn, 1),
|
/openbmc/linux/arch/arm64/tools/ |
H A D | sysreg | 2189 Field 37 TRCCNTVRn 2252 Field 37 TRCCNTVRn
|