Searched refs:TRCCIDCVRn (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/hwtracing/coresight/ |
| H A D | coresight-etm4x.h | 91 #define TRCCIDCVRn(n) (0x600 + (n * 8)) macro
417 CASE_##op((val), TRCCIDCVRn(0)) \
418 CASE_##op((val), TRCCIDCVRn(1)) \
419 CASE_##op((val), TRCCIDCVRn(2)) \
420 CASE_##op((val), TRCCIDCVRn(3)) \
421 CASE_##op((val), TRCCIDCVRn(4)) \
422 CASE_##op((val), TRCCIDCVRn(5)) \
423 CASE_##op((val), TRCCIDCVRn(6)) \
424 CASE_##op((val), TRCCIDCVRn(7)) \
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| H A D | coresight-etm4x-cfg.c | 92 } else if ((offset >= TRCCIDCVRn(0)) && (offset <= TRCVMIDCVRn(7))) { in etm4_cfg_map_reg_offset()
97 CHECKREGIDX(TRCCIDCVRn(0), ctxid_pid, idx, off_mask); in etm4_cfg_map_reg_offset()
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| H A D | coresight-etm4x-core.c | 489 etm4x_relaxed_write64(csa, config->ctxid_pid[i], TRCCIDCVRn(i)); in etm4_enable_hw()
1747 state->trccidcvr[i] = etm4x_read64(csa, TRCCIDCVRn(i)); in __etm4_cpu_save()
1872 etm4x_relaxed_write64(csa, state->trccidcvr[i], TRCCIDCVRn(i)); in __etm4_cpu_restore()
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