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Searched refs:TM_WORD2 (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/
H A Dxive-regs.h79 #define TM_WORD2 0x8 macro
/openbmc/qemu/hw/intc/
H A Dxive.c178 memcpy(&tctx->regs[TM_QW2_HV_POOL + TM_WORD2], &qw2w2, 4); in xive_tm_pull_pool_ctx()
185 tctx->regs[TM_QW3_HV_PHYS + TM_WORD2] = value & 0xff; in xive_tm_vt_push()
191 return tctx->regs[TM_QW3_HV_PHYS + TM_WORD2] & 0xff; in xive_tm_vt_poll()
380 memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4); in xive_tctx_set_os_cam()
492 { XIVE_TM_HV_PAGE, TM_QW1_OS + TM_WORD2, 4, xive_tm_push_os_ctx, NULL },
494 { XIVE_TM_HV_PAGE, TM_QW3_HV_PHYS + TM_WORD2, 1, xive_tm_vt_push, NULL },
495 { XIVE_TM_HV_PAGE, TM_QW3_HV_PHYS + TM_WORD2, 1, NULL, xive_tm_vt_poll },
513 { XIVE_TM_HV_PAGE, TM_QW1_OS + TM_WORD2, 4, xive2_tm_push_os_ctx, NULL },
515 { XIVE_TM_HV_PAGE, TM_QW3_HV_PHYS + TM_WORD2, 1, xive_tm_vt_push, NULL },
516 { XIVE_TM_HV_PAGE, TM_QW3_HV_PHYS + TM_WORD2, 1, NULL, xive_tm_vt_poll },
H A Dxive2.c294 memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2_new, 4); in xive2_tm_pull_os_ctx()
403 memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4); in xive2_tm_push_os_ctx()
H A Dspapr_xive.c658 memcpy(&tctx->regs[TM_QW1_OS + TM_WORD2], &qw1w2, 4); in xive_tctx_set_os_cam()
/openbmc/qemu/include/hw/ppc/
H A Dxive_regs.h90 #define TM_WORD2 0x8 macro
H A Dxive.h367 return *((uint32_t *) &ring[TM_WORD2]); in xive_tctx_word2()
/openbmc/linux/arch/powerpc/sysdev/xive/
H A Dnative.c402 if (in_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2) & TM_QW2W2_VP) in xive_native_setup_cpu()
428 out_be32(xive_tima + TM_QW2_HV_POOL + TM_WORD2, TM_QW2W2_VP | vp_cam); in xive_native_setup_cpu()
H A Dspapr.c652 in_be32(xive_tima + TM_QW1_OS + TM_WORD2)); in xive_spapr_setup_cpu()
/openbmc/linux/arch/powerpc/kvm/
H A Dbook3s_xive.c702 __raw_writel(vcpu->arch.xive_cam_word, tima + TM_QW1_OS + TM_WORD2); in kvmppc_xive_push_vcpu()