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Searched refs:TM_QW3_NSR_HE_POOL (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/
H A Dxive-regs.h128 #define TM_QW3_NSR_HE_POOL 1 macro
/openbmc/qemu/include/hw/ppc/
H A Dxive_regs.h141 #define TM_QW3_NSR_HE_POOL 1 macro
/openbmc/linux/arch/powerpc/sysdev/xive/
H A Dnative.c378 case TM_QW3_NSR_HE_POOL: /* HV Pool interrupt (unused) */ in xive_native_update_pending()