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Searched refs:TM_IPB (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/
H A Dxive-regs.h65 #define TM_IPB 0x2 /* - + + + */ macro
/openbmc/qemu/hw/intc/
H A Dxive.c82 regs[TM_IPB] &= ~xive_priority_to_ipb(cppr); in xive_tctx_accept()
83 regs[TM_PIPR] = ipb_to_pipr(regs[TM_IPB]); in xive_tctx_accept()
89 regs[TM_IPB], regs[TM_PIPR], in xive_tctx_accept()
112 regs[TM_IPB], regs[TM_PIPR], in xive_tctx_notify()
134 regs[TM_IPB], regs[TM_PIPR], in xive_tctx_set_cppr()
151 regs[TM_IPB] |= ipb; in xive_tctx_ipb_update()
152 regs[TM_PIPR] = ipb_to_pipr(regs[TM_IPB]); in xive_tctx_ipb_update()
652 ring[TM_NSR], ring[TM_CPPR], ring[TM_IPB], ring[TM_LSMFB], in xive_tctx_ring_print()
721 ipb_to_pipr(tctx->regs[TM_QW1_OS + TM_IPB]); in xive_tctx_reset()
723 ipb_to_pipr(tctx->regs[TM_QW3_HV_PHYS + TM_IPB]); in xive_tctx_reset()
H A Dxive2.c225 nvp.w2 = xive_set_field32(NVP2_W2_IPB, nvp.w2, regs[TM_IPB]); in xive2_tctx_save_os_ctx()
/openbmc/qemu/include/hw/ppc/
H A Dxive_regs.h76 #define TM_IPB 0x2 /* - + + + */ macro